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alertcon4



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Job description is below:

Quote:
Test Wafer Engineer Position



JOB DESCRIPTION AND RESPONSIBILITIES

Fab 68, currently under construction Dalian, PRC is planned for chipset production in 2010.  It is Intel’s first greenfield fab in a new geography in 15 years.



The Test Wafer Engineer will play a key role in the strategy development effort for test wafer management.  Responsibilities center around the transfer of systems and the pre-build and coordination of test wafers to support tool qualification.  During start up this person will track shipments and coordinate incoming material in a high stress environment.  This person will be trained to work with silicon systems people to forecast silicon requirements and ensure that systems are in place to transport, store and start the material per requirements.  The candidate is expected to adapt quickly and have a good aptitude for a variety of related systems.



Following completion of the startup phase, this person will work to continually improve test wafer efficiency and costs. 



Some specific responsibilities include:

Learn Intel culture and systems
Partner in the coordination and transfer of test silicon from the build site in U.S. to Dalian.  During the early period of tool qualification, this person will be involved in wafer shipments going to and from the transfer site in rapid succession.
Over time, this person will be expected to master Test Wafer management systems and to be an initiator in system development and improvement.
Provide ongoing cost tracking, forecasting, presentations, etc. to hit test wafer cost and usage goals.
Must be able to effectively work with fab customers to instill disciples in test wafer housekeeping and management.
Interface with Test Wafer counterparts in other Intel factories to understand and build on lessons learned from previous start-ups.
Analyze and evaluate options from large, and sometimes complex data sets
Distill analyses’ results and options into simple, straightforward communication.




QUALIFICATIONS

Desired experience and skills to be considered a viable candidate for this position:



1) Experience with supply chain management and logistics

2) Experience in a manufacturing environment is desirable but preferred candidate will have experience in semiconductor manufacturing.  Test wafer management experience in semiconductor environment is even a better fit for this role.

3) Excel or experience using spreadsheets is a desirable skill to enable forecasting and manipulation of large data fields.
4) Demonstrated, effective verbal and written communications and problem solving skills are required.  The position typically requires a BS in a Business, Manufacturing, or Engineering discipline plus at least 2 years of related experience or equivalent.
5) The position requires some international travel to other Intel TMG sites with a potential temporary assignment culminating in a permanent assignment in Dalian, China.

6) Strong personal and leadership skills are required:

The candidate must be able to bring groups with diverse interests and goals together and obtain their commitment to a single, integrated plan which meets Fab68’s business goals for key toolsets. 
Ability to communicate in English both verbally and in written form.


Given this is a startup and in a new Intel location, the candidate will need to tolerate ambiguity and demonstrate flexibility due to inevitable surprises. 




[ 此帖被alertcon4在2010-03-10 20:36重新编辑 ]
顶端 Posted: 2009-08-11 23:57 | [楼 主]
西西哈哈



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做采购。。。与供应链有关。。。英语不行。。。年资不行。。。。
顶端 Posted: 2009-08-13 20:03 | [1 楼]
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