第一个

SoC ASIC Verification Engineer  Vacancy:1
Job Description :
Ø Develop and maintain ASIC/SoC testbench environment at block and/or system level using Verilog, Systemc, PLI/C or SystemVerilog.
Ø Develop and execute various tests to verify the chip functionality according to Chip Spec.
Ø Create verification plans and define application tests to meet the requirement of functional/code coverage.
Ø Develop and maintain script/Makefile for simulation compile/running, regression running, parameterized simulation, result analysis, etc.
Job Requirements :
Ø BSEE, MSEE with 4+ years experience preferred；
Ø Must be capable of independently developing test plans, test benches, tests；
Ø Strong design background and must be capable of debugging RTL, gate sim debug capability is a plus.
Ø Hand-on verification experience on SoC, the areas include ARM, AMBA, DDR2, PCIe, USB, CODEC, etc.
Ø Good knowlege of the whole ASIC/SoC development flow.
Ø Experience with at least one scripting language, TCL or Perl is preferred.
Ø Good English written and communication skills.
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第二个

Senior SoC ASIC Verification Engineer  Vacancy:1
Job Description :
Ø Instrumental in the development of infrastructure for the validation of ARM AMBA-based architectures and the verification of SoC hardware.
Ø Additional duties include the development of directed and random hardware verification environments, and the application of those environments to SOC verification
Ø Integration of VIP UVC and functional verification agents in OVM verification environment to support coverage-driven verification
Job Requirements :
Ø Extensive Verilog experience with SOC verification environments.
Ø Verification experience on ARM, AXI, and DMA with VIP UVC
Ø Experience developing bus functional models, monitors, scoreboards, generators, functional coverage models
Ø Experience with high level verification languages such as SystemVerilog, OVM or VMM, Vera or Specman, and strong C++ programming background
Ø Shell scripts and Perl expertise, create runsim, lsf, regression management scripts
Ø Able to understand Verilog RTL code, debug simulation errors, identify and fix RTL/Environment issues
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第三个

Senior SoC ASIC Design/Verification Engineer  Vacancy:1
Job Description :
Ø Integration of ARM processor and AMBA bus for SoC;
Ø Integration of H264 Codec , DDR, USB and PCIe for SoC;
Ø Design SoC-level logic including clock, reset, and DFT;
Ø Verification of AMBA-based DMA, Memory Subsystem, and all peripheral interfaces at unit level and SoC level
Ø Work with analog group and physical layout team on analog macro integration and synthesis/timing analysis.
Job Requirements :
Ø 5+ years experience on SoC design and integration;
Ø Hand-on experience in ASIC flow;
Ø Experience of ARM/AMBA integration and/or verification;
Ø Experience of DMA design and/or verification;
Ø Experience of H264 Codec & DDR SoC integration and verification
Ø Domain knowledge on Nand Flash Controller, USB, and PCIe is a plus
Ø Specman ERM and OVM verification experience is a big plus

楼主公司在哪里？什么公司我有个以前的同事也是做verification，现在正在找工作。
楼主能帮忙推荐下不？

PS:这帖子太悲剧了，跑题也跑得太远了。

Quote:

引用第19楼白菜道士于2010-01-22 20:47发表的  :

能有英格索兰1/100000000牛X吗？？？

烦不烦啊你。
受不了你了。

有的人就是JIAN。

Quote:

引用第26楼枫姐姐于2010-01-23 13:45发表的  :

[屏蔽]去了趟展讯，带去了国家的支持和慰问，于是展讯在全年亏损的状况下照样涨薪，还发了4个月工资的年终奖

展讯第三季度就已经小幅盈利了。

Quote:

引用第34楼枫姐姐于2010-01-23 22:43发表的  :

NVIDIA，牛X公司

不是吧，我咋不知道呢。
我只知道有招后端的。

看条件就不像：
AMBA,AXI,VMM,OVM.
看这些东西都不像是NV.

Quote:

引用第54楼枫姐姐于2010-01-24 00:26发表的  :

莫非枫姐姐看花眼了
杯具，眼花了

看枫姐姐的片看多了吧。

牛X
俺不喜欢UNIX,VIM用起来很不爽，还是UE好用。

还有GDB，太杯具了。

寒。。。。。
发帖推荐IC后端的是我的另外一个ID。

不是，就是你刚才提的NV

俺说这个推荐的公司应该不是NV，因为我在里面没有听说有招这个的噻。只说有后端的需求。这个帖子的楼主又不是我。我也想知道是什么公司，我有前同事想跳槽做这个。

另一个帖子推荐ＩＣ后端的是我。  

Quote:

引用第68楼枫姐姐于2010-01-24 00:48发表的  :
杯具，看来枫姐姐真的眼花了 

XX伤身啊，保重啊。。。。。。