一个朋友在AMD，内部推荐，有意者请将简历发至：calitrean@yahoo.cn

急招如下职位：

工作地点：上海

JOB TITLE:
MTS Physical Design Engineer
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
Work with global Front-End design team and physical design team for large scale ASIC
chip physical implementation. Focus on physical design of deep sub-micron GPU chips
including block level (full chip) floor planning, timing closure, place&route, physical
verification etc.
PREFERRED EXPERIENCE:
1. PhD with 3+ years of industrial experience or MSEE with 5+ years of industrial
experience in ASIC design
2. Experience on hierarchical design from chip level to block level.
3. Expertise in place and routing, signal integrity, power analysis, CTS design, DFT,
design rule and connectivity verification, timing closure.
4. Successfully gone through complete product development cycle. Good analytical and
debugging skills
5. Good listening, writing and speaking English.
6. Good communication skills, strong interpersonal skills and the flexibility. Dedicated,
hard working and good team player
7. Familiar with Back-End (physical design) EDA tools (synopsys, cadence, magma)
8. Familiar with Front-End EDA tools or circuit design is a plus
9. Familiar with Unix/Linux environment and good at scripts

JOB TITLE:
MTS ASIC Design Engineer
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
1. Responsible for Front-End chip implementation including design, implementation
and execution of the flow that starts with RTL code and ends with the delivery of a
netlist package ready for physical design
2. Build test bench and monitors for DUT
3. Debug function/performance bugs of relative memory control blocks
PREFERRED EXPERIENCE:
1. MS or above of EE or related fields.
2. A solid foundation of Computer Architecture or DDR feature or memory controller
3. At least 5 years work experience on Design.
4. Proficient on Verilog and asic design flow
5. Familiar with Perl or other script language
6. Fluency in English
7. Good at communication

Job Title:
Staff/ Sr. GPU ASIC Integration Engineer
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION
- Responsible for the execution of the chip integration process. This will include
design, implementation and execution of the flow that starts with RTL code and ends
with the delivery of a netlist package ready for physical design.
- Responsible for synthesis, netlist generation, timing and logical equivalency checks,
and timing constraint management. In this role you will get to experience many
aspects of the chip design process working as the bridge between the logic design &
verification group and the physical design group. Every piece of the design that will
make it into the final chip will at some point pass through your virtual hands.
PREFERRED EXPERIENCE:
1. Master Degree in electrical engineering with 4+ years of digital circuit design and
logic design experience; Or Bachelor Degree with 7+ years related working
experience
2. Familiar with Verilog HDL coding and ASIC Frond-End flow
3. Familiar with unix/linux and scripts (tcl, perl etc.)
4. Strong task-based organization skill
5. Computer Architecture and computer Arithmatic
6. Computer Graphic Basic knowledge(a plus)
7. DDR-SDRAM/PCI/PCI-e experience(a plus)

Job Title:
Staff ASIC Verification Engineer___Display
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION
- Responsible for display IP development and maintenance
- Responsible for IP level synthesis/formal check
- Work with verification engineer on IP level validation
- Work with front-end integration team and physical design team on timing closure
- Communication with driver team to build driver
PREFERRED EXPERIENCE:
- Bachelor with 5+ yeas and Master with 3+ in Electrical or Computer Engineering.
- Strong RTL coding and familiar with front-end design flow
- Experience on synthesis, timing analysis and formal verification.
- Experience of Video/Graphics post-processor(scaling/composition/gamma/deinterlace)
is a plus
- Experience of display specific-interconnection protocols (DisplayPort, LVDS,
VGA,HDCP, DVI, HDMI etc) is a plus.
- Good at C/C++, Perl, familiar with SystemC, PLI, Makefile is a plus
- Design for verification (assertion based design strategies, code coverage, functional
coverage, test plan etc.)
- Good communication skills and fluent English.
- Strong responsibilities and team spirit.

Job Title:
Staff ASIC/Layout Design Engineer__PCIe
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION
- Participate IP and SoC level architecture definition, derive functional and design
specifications and analyze feasibility of technical and architectures.
- Implement design with Verilog to achieve specification goals. Simulate and debug
the codes in coding stage.
- Go through the FE design flow to deliver qualified netlist. Feedback to Physical
Design team to help to close timing and check floorplan.
- Write ASIC specific part of test plan. Co-work with verification engineers to prove
functional correctness from block level to SoC level
- Support FW/SW bring-up and debugging
- Working as the technical point of contact on the ASIC area.
- Maintain design environment, solve flow issues, and develop scripts to improve flow
efficiency.
PREFERRED EXPERIENCE:
- Major in EE & CS
- Proven ASIC / SoC Design Experience (5+ years as a bachelor, 3+ years as a master).
- Must have strong background on IP development
- Must be proficient in Verilog coding, debugging and modeling
- Must be skilled in ASIC design flow, such as synthesis, DFT, timing analysis, ECO
etc.
- Must be skilled in mainstream EDA tools for design and simulation such as
ncsim/vcs, RC/DC, PT, Formality/LEC and DFT.
- Must be familiar with verification methodologies for from block level to SoC level.
- Should be familiar with shell/perl/tcl programming in linux OS.
- Should be familiar with P&R and Manufacture tech.
- Good English hearing, speaking, reading and writing capabilities.
- Will be a big plus if having mass production tape‐out experience.
- Will be a plus if having C/C++/SystemVerilog experience

Job Title:
Staff ASIC/Layout Design Engineer__South Bridge
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION :
The AMD South Bridges Group has openings for a MTS/Sr. Design Verification
Engineer. The successful candidate will apply current functional verification techniques
to perform and improve pre-silicon verification quality and product Time to Market for
Southbridge design. He/She should be able to work independently on various DV tasks
and providing technical guidences to the DV team. The candidate would involve
technically in the porting/creation of the DV environment for the new design, block and
chip level testplan creation and implementation, coverage analysis, and regression
cleanup.
PREFERRED EXPERIENCE:
- MSEE,BSEE or equivalent degree,
- Minimum of 3 years of ASIC design verification experience.
- Knowledge of design verification methodologies.
- Some of the peripheral I/O interfaces, such as PCIE, USB, SATA,PCI, SD, JTAG or
Ethernet.
- Shell/perl/Makefile programming in linux OS.
- Verilog design/simulation and SystemC/C++ programming
- Hardware assertion languages such as PSL/SVA,
- Test bench creation and functional coverage with HDL's such as System Verilog or
SystemC.
- Good verbal and written communication skills in both Chinese and English.

Job Title:
Sr. DV Engineer
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION :
We are currently looking for an Senior Eng Design Verification Engineer who will be
responsible for all aspects of verification on next generation integrated processors chipset,
including developing DV infrastructure environment, testbenches, modeling,
assertions/checkers/monitors, test plan & test development, regressions, and
infrastructure development. Responsibility includes participating in the pre-silicon blocks,
chip, multi-chip and system level verification strategy:
- Verification of Graphic North Bridge design using complex DV environment C/C++,
SystemVeilog, OVM, SystemC, Verilog - Infrastructure development
- Experience in use of front end CAD tools Synopsys (VCS, )
- Strong documentation and communication skills.
- Ability to work well in a dynamic, fast-paced, pressure filled, multiple sites North
America and Asia
- Flexible in terms of responsibilities and hours.
PREFERRED EXPERIENCE:
- Bachelor/Master in Electrical/Computer Engineering.
- Strong C and C++ software development and scripting languages (Perl, C Shell,
Makefile, …) experience.
- Good knowledge of SystemVerilog and OVM is desirable.
- 3+ years experience in Verification in a large scale ASIC design environment.
- Strong background with hardware verification methodologies such as coverage-based
verification methodology with the use of hardware assertions (PSL or SVA).
- Strong analytical thinking skills, excellent attention to detail, and good coding skills
are required.
- Must be organized, enthusiastic self-starter and have good communication skills and
the ability and desire to work as a team.

Job Title:
MTS. SOC ASIC CAD engineer
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION
- Participate in the design and implementation of the leading edge, front-to-back ASIC
design flow which covers logical and physical implementation and analysis of
complex devices that integrate multiple cores and IP’s from organizations with AMD
global teams.
- Participate in the research of Design Methodology to improve automation and
productivity to produce AMD's new high-quality cutting-edge graphics processing
products
- Technical support and programming
- Interface with EDA venders on technology
PREFERRED EXPERIENCE:
- major in EE, CS or related, Master Degree with 5+ years or Bachelor with 7+ years
working experiences
- good programming skill with one or more languages (eg, tcl, perl , python, c/c++, etc)
in unix/linux and a strong desire to automate flow
- experience in ASIC design (digital design, Front-end or Back-end,)
- familiar with one or more ASIC flows (logic synthesis, STA, formality check, Design
for Power ) and usage of related EDA tools
- Good written and spoken English
- Good communication skills and be able to work both independently and in a team

Job Title:
Sr. SOC ASIC CAD engineer
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION
- Participate in the design and implementation of the leading edge, front-to-back ASIC
design flow which covers logical and physical implementation and analysis of
complex devices that integrate multiple cores and IP’s from organizations with AMD
global teams.
- Participate in the research of Design Methodology to improve automation and
productivity to produce AMD's new high-quality cutting-edge graphics processing
products
- Technical support and programming
- Interface with EDA venders on technology
PREFERRED EXPERIENCE:
- major in EE, CS or related, Master Degree with 3+ years or Bachelor with 5+ years
working experiences
- good programming skill with one or more languages (eg, tcl, perl , python, c/c++, etc)
in unix/linux and a strong desire to automate flow
- experience in ASIC design (digital design, Front-end or Back-end,)
- familiar with one or more ASIC flows (logic synthesis, STA, formality check, Design
for Power ) and usage of related EDA tools
- Good written and spoken English
- Good communication skills and be able to work both independently and in a team

Job Title:
Front-end ASIC Design CAD Engineer for Graphics Hardware
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION
- Understand the FE ASIC design flow, design verification flow, and integration flow.
- Consolidate the design and verification methodologies for graphics and microprocessor
hardware.
- Develop infrastructure and release for variant IP/SOC teams.
- Explore the advanced design and verification methodologies for high efficient R&D.
PREFERRED EXPERIENCE:
- Good written and fluent oral English
- Graduates from Electrical Engineering (EE) or Computer Science (CS)
- Master with 2+ working experience, or Bachelor with 3+ working experience
- Familiar with Linux Environment (including shell scripting and linux gnu tools)
- Scripting language experience a plus (perl, ruby, tcl, etc.)
- Experience with design verification methodologies (plus)
- Major in EE required:
􀂄 2+ year experience on Verilog HDL coding and debugging
􀂄 1+ year experience on c/c++
􀂄 Familiar with SystemVerilog
- Major in CS required:
􀂄 3+ year experience on c/c++
􀂄 1+ year experience on Verilog HDL coding and debugging (plus)
􀂄 Familiar with SystemVerilog or SystemC (plus)

JOB TITLE:
MTS Design Engineer__Southbridge
LOCATION:
Shanghai
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
The AMD South Bridges Group has an opening for MTS Design Engineer familiar with
USB technology. The successful candidate will work with team members and apply
his/her design techniques to work on different phases of complex logic design for USB
host controllers in Southbridge. The role will include working on the following tasks
from time to time, specification, HDL coding, synthesis, timing closure, etc. The job may
require some lab bringup and debugging of our reference PC system after the
Southbridge chip comes back.
PREFERRED EXPERIENCE:
1. The successful candidate will have a MSEE,BSEE or equivalent degree.
2. Must have minimum of 5+ years of ASIC design experience, proficient in
RTL(verilog), experienced with top level integration tasks, familiar with simulation,
synthesis, and timing.
3. The candidate must have the experience/knowledge of USB 1.1/2.0 and
OHCI/EHCI.
4. It is preferred the candidate is familiar with USB 3.0 and xHCI.
5. The candidate must exhibit good verbal and written communication skills in both
Chinese and English.
6. Hands-on lab experience is a plus, able to understand and/or use the use scopes,
logic analyzers, has knowledge or skill of PC system lab debugging.

JOB TITLE:
Sr. Eng DV Engineer__Fusion
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
We are currently looking for Senior Eng Design Verification Engineers who will be
responsible for all aspects of verification on next generation integrated processors (CPU
+ GPU + Multi Media) chipset, including developing testbenches, modeling,
assertions/checkers/monitors, test plan & test development, regressions, and
infrastructure development. Responsibility includes participating in the pre-silicon blocks,
chip, multi-chip and system level verification strategy:
- Verification of Graphic North Bridge design using random methodologies – Test
Planning, Implementation and Execution.
- Develop System Verilog (OVM) random sequences and methods.
- Maintain and Interface with existing random generators, models and APIs
- Integration of random modules to various testbenches.
- Executing verification through directed and random tests for its functionality and
interface protocols and tracking bug reports. Creation of the needed test libraries, test
API, simulation models. Debugging regression failures and identify the cause.
- Strong documentation and communication skills.
- Ability to work well in a dynamic, fast-paced, pressure filled, across multiple sites
North America and Asia
- Flexible in terms of responsibilities and hours.
PREFERRED EXPERIENCE:
- Bachelor/Master in Electrical/Computer Engineering.
- 4+ years experience in complex ASIC/SOC Design Verification, direct experience in
SOC or Processor (GPU or CPU) or Industry bus standard (PCI-e, MC, HT) or
multimedia/video is preferred.
- Good knowledge of SystemVerilog and OVM.
- Good knowledge of Verilog/C/C++/System C/SystemVerilog.
- 2+ years experience in Verification.
- Verification insights into random techniques.
- Verification of large scale ASICs.
- Working knowledge of x86 assembly programming is an asset.
- Experience in power verification is an asset.
- Verification of Virtualization Components is an asset.
- Strong C and C++ software development and scripting languages (Perl, C Shell,
Makefile, …) experience.
- Strong background with hardware verification methodologies such as coverage-based
verification methodology with the use of hardware assertions (PSL or SVA).
- Strong analytical thinking skills, excellent attention to detail, and good coding skills
are required.
- Must be organized, enthusiastic self-starter and have good communication skills and
the ability and desire to work as a team.

JOB TITLE:
Senior Program Manager – GPU Solutions Engineering
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
The individual who fills this role will be responsible for driving programs from inception
to full deployment. This individual will lead cross-functional product development core
teams, aligning all aspects of engineering and operation execution to meet business goals.
This individual will interact with AMD executives and senior management team, 3rdparty
partners, and possibly customers. This individual will be responsible for the
management of program execution and its day-to-day activities centered around GPU
development, post-silicon validation, and pre-production ramp. This individual will work
with engineering management to drive execution excellence, including key metrics like
Time-to-Market, Time-to-Yield, and Silicon Quality Indicators. This individual will work
collaboratively with the AMD Program Management community on infrastructure
development and continuous process improvement. Work is strategic and tactical in
nature with execution excellence being a key priority. Communication is a critical part of
this role which includes interpreting/understanding business directions, explaining
tactical details, and recommending solutions regarding complex program situations. The
job may lead to more supervisory roles, and working directly with executives. Travel is
expected for this role.
PREFERRED EXPERIENCE:
- BS in EE (or equivalent). Masters in EE or Engineering/Operations Management (or
equivalent) preferred.
- Experience in managing large, complex, interrelated projects, programs, and
functions to aggressive deadlines.
- Experience in large scale ASIC development, including definition, integration,
physical design, and design verification.
- Working knowledge across multiple engineering disciplines (i.e. Boards, Thermal,
Packaging, Process Technology, Product Engineering, Software) is desirable.
- Experience in Operations, Product Marketing, and/or Product Management is a plus.
- Ten years minimum related experience with five years (plus) management experience
- Experience with programs that can change quickly and may be speculative in nature.
- Results driven, disciplined, and analytical.
- Good problem solving skills, interpersonal skills, communications skills, and
teamwork spirit.


[ 此帖被枫姐姐在2010-05-15 15:50重新编辑 ]

Title: MTS/SMTS Electrical Analysis and Debug Location: Shanghai #1
 JOB DESCRIPTION:
Processor silicon DDR interface electrical test and debug engineer in the Shanghai Research & Development Design Center. In this role, this senior level engineer will be part of a highly technical team that develops test plans, executes bring-up & test plans, & debugs electrical issues in the memory sub-system of new processors. The job entails extensive hands-on lab work as well as technical leadership and communication across teams.
 SPECIFIC JOB FUNCTIONS:
1) Provides DDR technical leadership in the development of new test & validation features
2) Closely interacts with silicon design (DRAM controller and phy) in test execution & debug, as well as in feature definition for future product generation
3) Writes comprehensive electrical & functional test plans for the memory validation of processors
4) Executes electrical & functional test plans for AMD processors using hardware & software validation tools, oscilloscopes, & logic analyzers. 5) Debug of electrical & functional issues of the memory sub-system of new processors
6) Provides detailed input into the platform definition & review of platform designs used in the silicon validation of new processors. 7) Provides technical guidance and training to less experienced engineers and technicians in the planning, test, & debug of the memory sub-system.
 SKILLS REQUIRED:
1) BS-EE / BS-CE with at least 10 years directly related experience. An advanced degree will be considered a plus. 2) Requires experience and demonstrated technical expertise in the development & execution of platform level electrical & functional test plans. DDR2/3 Memory test experience on electronic components such as Processors would be considered a big plus. 3) Requires extensive hands-on experience and demonstrated technical expertise in the debug of I/O interfaces such as DDR 4) Demonstrated experience with or knowledge using oscilloscopes, reading schematics and layout documentation
5) Requires good written and oral communication skills.
6) Demonstrated ability to communicate with a variety of engineering disciplines and management.

Title: SMTS/MTS for Hardware/Platform Design Engineer Location: Shanghai #1
 JOB DESCRIPTION:
Technical leader responsible for graphic, motherboard, and system design in our Shanghai Research and Development Center (SRDC). Systems are integrated combinations of hardware components (CPUs, graphics, memory, IO adapters, peripherals, and BMCs) and software components (firmware, drivers, OS, virtualization, and system management). This individual will interface with the Marketing, Silicon design, Software, and Validation teams to define our platforms for new silicon, provide detailed technical direction to the SRDC engineers to draw schematics, layout the board, develop the System BOM, bring up, debug issues, and complete Motherboard QA testing.
 SPECIFIC JOB FUNCTIONS:
1) Motherboard and system specification, negotiate features with input teams and silicon designers
2) Schematic capture and guide layout of motherboards for new silicon
3) Feedback and refine design rules with simulation and silicon design teams
4) Bring up and validate motherboard and systems
5) Negotiate solid solutions to technical issues and design challenges
6) Ensure all processes are met in development
7) Contribute to client system development processes, team development, tool development
8) Support silicon validation, characterization, and debug of existing and new microprocessor and chip-set products
9) Project planning, status tracking, and reporting to senior management
 SKILLS REQUIRED:
1) Excellent communication skills
2) Prior experience with software testing tools and environments, defect tracking, and revision control
3) Familiar with Microsoft Client Operating Systems, Linux Operating Systems, virtualization software (VMware, Xen, et al), and validation/certification processes for each of these environments
4) Familiar with client system component compatibility and stress testing
5) Familiar with high performance client IO adapters, drivers, and stress testing
6) Familiar with general Computer Architecture concepts
7) Skilled in Cadence Concept schematic capture
 SKILLS PREFERRED:
1) Familiar with Cadence Allegro layout tools
2) Familiar with MS Office & MS Project tool suites
3) Familiar with microprocessor bring-up and debug
4) Familiar with C/C++, JAVA, and scripting language programming
 PREFERRED EDUCATION AND EXPERIENCE:
A Bachelor's and/or Master's degree in Computer Science or Computer Engineering. Requires 10-20 years experience leading computer system development.


Title: MTS-SMTS Thermal Mechanical Engineer Location: Shanghai #1
 JOB DESCRIPTION:
This position will be responsible for thermal and mechanical engineering in support and development of discrete graphics, graphics cards, CPUs, and chipsets in AMD Shanghai Research and Development Center (SRDC). The position is for an experienced engineer that will perform hands-on engineering with local board engineering teams in SRDC, suppliers/partners in the thermal management field in the Far East, and interface with other AMD engineering and development organizations in various locations – Toronto, Canada; Austin, Texas, Sunnyvale, CA, Singapore, and others.
 SPECIFIC JOB FUNCTIONS:
This position will entail experimental thermal/fluid mechanics work directed at the development of thermal solutions, mechanical design of components and systems, and/or numerical analysis of thermal/fluids or mechanical aspects. Good lab skills, experience with data acquisition using Lab View, and general heat transfer and fluid mechanics skills are required. Experience in cross functional leadership roles or technical management/project leadership is required. Creation and maintenance of keep out, part and assembly drawings will also be required. Experience with Pro/E and Solid Works is required. Experience with Flotherm, Icepak, or ANSYS is a plus. This specific candidate will also support critical customers in thermal and mechanical area when designing with AMD products. Candidates with experience in a combination of these skills are encouraged to apply.
 COMMUNICATION SKILLS:
Due to the breadth and interactions of this position, good communication skill, in spoken and written English, are required.
 PREFERRED EDUCATION AND EXPERIENCE:
Mechanical Engineering Graduate with BSME minimum, MSME preferred with 7-10 years of experience at computer or Semiconductor Company in thermal and mechanical engineering.

Title: PMTS Systems Debug Engineer Location: Shanghai #1
 JOB DESCRIPTION:
Build and provide technical leadership and direction to the system debug team. Systems debug team is responsible for analysis and resolution of AMD silicon and system issues which are on AMD reference platform designs and customer development stage PC systems across a broad range of market segments using oscilloscopes, logic analyzers and software/hardware debug tools in an intense but rewarding environment
 SPECIFIC JOB FUNCTIONS:
This person is responsible for establishing and maintaining AMD’s technological leadership position in Systems Debug domain. The individual will be responsible for projects and processes of significant strategic or commercial importance and for project/program results. He/she needs to be able to strategize and provide long term planning in technical as well as managerial. This individual should be able to coach/mentor experienced staff and provide consultative direction to Senior management. The individual will pioneer hardware/software design improvements to internal and external designs and will provide solutions to external and internal customers. Define innovative test fixtures, experiments, diagnostics and analysis procedures as needed. The successful candidate must have an intimate knowledge of PC architecture and PC system busses and be a highly motivated, innovative individual with a keen interest in finding and resolving silicon and platform failures.
 PREFERRED EDUCATION AND EXPERIENCE:
A technology related bachelor's degree or equivalent combination of training plus 9 years (or Masters with 7 years) lead-engineer experience in a computer system development and/or debug environment. Requires a good understanding of all PC HW and SW ( BIOS / Driver ) elements and knowledge of PC system architecture. Must be proficient in x86 32-bit protected mode assembly language. Requires effective communications and human relation skills. In depth experience w/ Hypertransport bus, DDR2 memory and/or PC I/O busses and the ability to rapidly learn new ones is preferred. Experience with micro-architecture and debug of AMD chipsets and/or CPUs would be a plus. Publications/patents in the system design/debug and participation in industry wide forums are preferred.

Title: MTS/Sr. Design Verification Engineer Location: Shanghai #2
 PREFERRED EXPERIENCE :
The successful candidate will have an MSEE,BSEE or equivalent degree, must have minimum of 3 years of ASIC design verification experience. The candidate should have knowledge of design verification methodologies. Must be similiar with SATA/SAS . The experinece on shell/perl/Makefile programming in linux OS is plus. Experience with Verilog design/simulation and SystemC/C++ programming is necessary. Experiences with Hardware assertion languages such as PSL/SVA, and the Experiences of testbench creation and functional coverage with HDL's such as System Verilog or SystemC is a plus. The candidate must exhibit good verbal and written communication skills in both Chinese and English.
 DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION :
The AMD South Bridges Group has openings for a MTS/Sr. Design Verification Engineer. The successful candidate will apply current functional verification techniques to perform and improve pre-silicon verification quality and product Time to Market for Southbridge design. He/She should be able to work independently on various DV tasks and providing technical guidences to the DV team. The candidate would involve technically in the porting/creation of the DV environment for the new design, block and chip level testplan creation and implementation, coverage analysis, and regression cleanup.
Title: MTS. ASIC CAD engineer Location: Shanghai #5
 JOB DESCRIPTION:
1) Participate in the design and implementation of the leading edge, front-to-back ASIC design flow which covers logical and physical implementation and analysis of complex devices that integrate multiple cores and IP’s from organizations with AMD global teams.
2) Participate in the research of Design Methodology to improve automation and productivity to produce AMD's new high-quality cutting-edge graphics processing products
3) Technical support and programming
4) Interface with EDA venders on technology
 PREFERRED EDUCATION AND EXPERIENCE:
1) major in EE, CS or related, Master Degree with 5+ years or Bachelor with 7+ years working experiences
2) good programming skill with one or more languages (e.g. tcl, perl , python, c/c++, etc) in unix/linux and a strong desire to automate flow
3) experience in ASIC design (digital design, Front-end or Back-end)
4) familiar with one or more ASIC flows (logic synthesis, STA, formality check, Design for Power, place & route, signal integrity analysis, CTS design, design rule and connectivity verification, DFT ) and usage of related EDA tools
5) Good written and spoken English
6) Good communication skills and be able to work both independently and in a team

Title: Board Program Manager
Location: Shanghai
Job Description:
- Manage the Design and Delivery of Desktop Board Projects.
- To catalyze efficient & speedy program execution and through leadership, effective
communication, organization, and planning.
- Manage technical issues, expectations and risk both within the Program Team and with
Internal Customers to ensure products meet their market window within acceptable quality
targets.
- Manage the sampling process for both internal engineering teams and Customers.
- Oversee material sourcing, particularly for long-lead components
- Drive & track Desktop Board Product schedules
- Oversee the Desktop Board Development Process to ensure all requirements are met;
- Provide business insight as it pertains to Board designs, and work effectively with vendors
and partners
- Provide concise updates to executive teams on plans, status and risk mitigation
- Drive process improvements initiatives in order to improve overall execution of programs;
Job requirements
- Electrical Engineering Degree (or equivalent)
- PMP Designation an asset;
- Must have good communication skills and the ability and desire to work as a team;
- Presentation Skills;
- Leadership Skills;
- Organization/Planning Skills;
- Knowledge of MS Project;
- Experience with cross-functional Teams;
- Experience with Electronics or Board Products;

Title: MTS/SMTS Thermal / Mechanical Design Engineer
Location: Shanghai
Job Description:
This position will be responsible for thermal and mechanical engineering in support and
development of discrete graphics, graphics cards, CPUs, and chipsets in AMD Shanghai
Research and Development Center (SRDC). The position is for an experienced engineer that
will perform hands-on engineering with local board engineering teams in SRDC,
suppliers/partners in the thermal management field in the Far East, and interface with other
AMD engineering and development organizations in various locations – Toronto, Canada;
Austin, Texas, Sunnyvale , CA, Singapore, and others.
Job Requirements:
SPECIFIC JOB FUNCTIONS: This position will entail experimental thermal/fluid mechanics
work directed at the development of thermal solutions, mechanical design of components and
systems, and/or numerical analysis of thermal/fluids or mechanical aspects. Good lab skills,
experience with data acquisition using Lab View, and general heat transfer and fluid
mechanics skills are required. Experience in cross functional leadership roles or technical
management/project leadership is required. Creation and maintenance of keepout, part and
assembly drawings will also be required. Experience with Pro/E and SolidWorks is required.
Experience with Flotherm , Icepak, or ANSYS is a plus. This specific candidate will also
support critical customers in thermal and mechanical area when designing with AMD products.
Candidates with experience in a combination of these skills are encouraged to apply.
COMMUNICATION SKILLS: Due to the breadth and interactions of this position, good
communication skill, in spoken and written English, are required.
PREFERRED EDUCATION AND EXPERIENCE: Mechanical Engineering Graduate with
BSME minimum, MSME preferred with 7-10 years of experience at computer or
semiconductor company in thermal and mechanical engineering

Title: Section Manager, Diagnostics development
Location: Shanghai
KEY RESPONSIBILITIES
• Manage a team who are responsible for diagnostics development, production diagnostics
release, customers support for AMD graphics products
• Start build up the team in SRDC that will work closely with the teams in Markham
• Hiring new team members to expand the teams capabilities to meet the challenges of a
growing market.
• Analyze graphic board hardware designs and architect comprehensive test strategies and
implement test suites
• Work with diagnostic team members, design and develop diagnostics software for nextgeneration
product
• Participate in board and system bring up
• Identifying and helping resolve hardware and diagnostic issues
• Provide diagnostics support for customers and Hardware teams
• Provide technical direction, mentoring, and skill development as well as regular performance
reviews for the team members.
• Forward thinker to improve development process and drive innovation
• Provide leadership and direction in crisis
• Responsible for execution of programs. Multiple projects on the go
REQUIREMENTS
• B.Sc. or M.Sc. In EE or CS or equivalent is required
• Good English required – verbal and written
• Mandarin
EXPERIENCE AND SKILLS
• 4+ years of experience managing a diagnostics design team.
• A minimum of 3+ years experience on driver or embedded SW development and closely
interact with HW designer (5+ years as a bachelor, 3+ years as a master)
• Hands on diagnostics development for an ASIC company is preferred
• Prior experience in a direct OEM customer interface role is preferred
• Experience in video capture and tuner technology highly desired
• Strong mix of large-scale software development ability and hardware understanding
• Proficient in C programming language
• Hands-on experience with any one of display interface, PCI-E, and GDDR memories is
preferred.
• Hands-on experience with 3D graphics is highly desired
• Strong experience with board bring up is essential
• Familiar with Linux
• Strong debugging and testing skills
• Strong communication skills
• Program management experience to handle multiple projects

Title: Manager, PCB Layout
Location: Shanghai
KEY RESPONSIBILITIES
• Manage a team who are responsible for AMD graphics and CPU client motherboard PCB
layout design, global library management, new technology development
• Hiring new team members to expand the teams capabilities to meet the challenges of a
growing market.
• Work and communicate with counterpart teams in NA to deliver successful PCB layout
design
• Provide technical direction, mentoring, and skill development as well as regular performance
reviews for the team members.
• Forward thinker to improve development process and drive innovation
• Provide leadership and direction in crisis
• Responsible for execution of programs. Multiple projects on the go
REQUIREMENTS
• B.Sc. or M.Sc. In EE or CS or equivalent is required
• Good English required – verbal and written
• Mandarin
EXPERIENCE AND SKILLS
• 4+ years of proven experience managing a PCB layout team
• A minimum of 5+ years hands on experience for PC/server motherboard or graphics board
PCB layout design(5+ years as a bachelor, 3+ years as a master)
• Skillful to operate Cadence Allegro, Concept, ProE along with strong skills in designing high
speed, multi layer, high density designs, Analog/RF layout and power supply layout.
• Hands on experience to create and manage PCB library
• Program management experience to handle multiple projects
• Highly self-motivated and a self starter and have good communications skills.
• Good knowledge of IPC specifications, PCB manufacturing and assembly process

Title: Sr. Engineer, Diagnostics Development
Location: Shanghai
KEY RESPONSIBILITIES
• Analyze graphics board hardware designs and architect comprehensive test strategies and
implement test suites
• Design and develop diagnostics software for next-generation products
• Participate in board and system bring up
• Production diagnostics release
• Identifying and helping resolve hardware and diagnostic issues
• Provide diagnostics support for customers and board design teams
REQUIREMENTS
• B.Sc. or M.Sc. In EE or CS or equivalent is required
• Good English required – verbal and written
• Mandarin
EXPERIENCE AND SKILLS
• A minimum of 6+ years experience on driver or embedded SW development and closely
interact with HW designers (6+ years as a bachelor, 4+ years as a master)
• Hands on diagnostics development for an ASIC company is preferred
• Prior experience in a direct OEM customer interface role is preferred
• Strong mix of large-scale software development ability and hardware understanding
• Proficient in C programming language
• Hands-on experience with any one of display interface, PCI-E, and GDDR memories is
preferred.
• Hands-on experience with 3D graphics is highly desired
• Strong experience with board bring up is essential
• Familiar with Linux
• Strong debugging and testing skills
• Strong communication skills

Title: Sr. Memory Tuning Engineer
Location: Shanghai
Graphics Platform Engineering Team has immediate opening for a Sr. memory tuning
engineer to provide continuous support to AMD design engineers in testing and qualification of
graphics memories specific to AMD Graphics Cards and provide first hand engineering
support to AIB and ODM customers in memory tuning, troubleshooting and failure analysis.
Key responsibilities of the position was listed as below
KEY RESPONSIBILITIES
• Work with Manager, MTAG to support the qualification of memories on AMD graphics
products.
• Develop and perform BIOS tuning and verify memory interface to test memories on various
AMD boards.
• Qualify alternate memory sources for AMD OEM, ODM and AIB customers.
• Troubleshoot and provide solutions and perform FAs for problems related to functionality of
memories on AMD boards.
• Perform Signal Integrity measurements as requested by OEM/ODM customers.
• Develop and improve memory test methodologies and procedures as the new memory
technologies emerge.
• Assist in joint qualifications with memory suppliers for new die memories or new devices
from new suppliers.
• Assist Field Application Engineers to support AMD customers in BIOS tuning and other
memory related issues.
• Generate memory qualification reports and maintain memory AVLs.
REQUIREMENTS
• B.Sc. or M.Sc. In EE or CS or equivalent is required
• Good English required – verbal and written
• Mandarin
EXPERIENCE AND SKILLS
• At least 6+ years experience in electronic hardware development or test environment (6+
years as a bachelor, 4+ years as a master)
• Understand high-speed mix-signal multi-layer PCB design techniques
• Experience with DRAM memories and knowledge of different memory technologies is an
asset.
• Skilful to operate high bandwidth oscilloscope for high speed signal measuring and
analyzing
• Good communication skills and tact in order to set up liaison with customers and memory
vendors and internal AMD departments.
• Knowledge of PC, CPU and graphics architectures
• Proven ability to effectively handle fast-pace projects
• Must be a self-motivated contributor and a strong team player
• Effective communication skills (both written and spoken) in English and Mandarin
https://amd.apply2jobs.com/index.cfm?fuseaction=mExternal.showJob&RID=9959&CurrentP
age=1
Title: Sr. Power Design Engineer
Location: Shanghai
Your responsibility is to drive voltage regulator (including and not limited to LDOs, VRDs, DCDC
SMPS, etc) development from inception to product launch, and to support board designs
through silicon improvements, performance/cost analysis, PCB layout, product bring-up,
qualification, reliability/safety testing, manufacturability analysis and volume production. In this
position you will work in a dynamic engineering environment participating in a wide variety of
challenging projects, transform ideas from the drawing board into commercial successes for
the company, and be part of a product development team that launches exciting new silicon
for the next generation graphics platforms.
RESPONSIBILITIES
- Drive power technology and deliver power solution for silicon verifications, reference designs,
custom OEM/ODM solutions for consumer, channel and workstation markets with optimum
performance, cost and re-usability meeting TTM
o Review customer requirements and lead performance and cost comparative analysis
o Research and evaluate components, simulate circuits, schematic capture, generate BOMs
and perform cost analysis to provide optimum solutions for volume production
o Work with board design engineers to plan board power budget and power distribution
o Work with thermal-mechanical team to overcome thermal challenges
o Guide and review power layout to ensure signal integrity and EMI performance with
minimum layer-count and PCB real-estate
o Debug prototypes and sign-off hardware qualification reports
o Support production and resolve post-production technical issues
- Platform and system power development from silicon integration/feature requests to
board/system architecture and industry specification definition and review
- Drive cross-functional teams to resolve issues
- Lead technical reviews with customers
- Participate in internal and external technical working groups or forums
REQUIREMENTS
- B.Sc. or M.Sc. in Electrical Engineering or equivalent focused in Power Electronics
- 4+ years of power design experience for microprocessors in motherboard or graphics
board/module or equivalent
- In-depth theoretical and practical knowledge in microprocessor power requirements,
component and PDN parasitics, controller topologies and algorithms, bandwidth and
compensation design, large-transient response optimization, PSM, voltage/current sensing
architecture, dynamic voltage managements, device integration, package thermal limitation,
etc.
- In-depth knowledge of power electronics simulation tools (Pspice, Simplis, MATLAB, etc)
and lab equipments
- In-depth knowledge of the latest component developments and trends related to VR designs
- Working experience with leading microprocessor power suppliers
- Proven ability to lead complex/fast-pace projects from specification through to production
- Knowledge of high-speed mix-signal multi-layer design techniques
- In-depth understanding of relevant industry standards: VR specifications, interface (PCI
Express, MXM), ATX/SSI power supply, I2C, PMBus, DrMOS, Energy Star, etc
- Must be a self-motivated contributor and a strong team player with technical leadership skills
to support optimal team performance
- Some level of technical leadership experience is desired
- Excellent team work, communication and organizational skills
https://amd.apply2jobs.com/index.cfm?fuseaction=mExternal.showJob&RID=9960&CurrentP
age=1
Title: SMTS Electrical Analysis and Debug Engineer
Location: Shanghai
JOB DESCRIPTION
Processor silicon DDR interface electrical test and debug engineer in the Shanghai Research
& Development Design Center. In this role, this senior level engineer will be part of a highly
technical team that develops test plans, executes bring-up & test plans, & debugs electrical
issues in the memory sub-system of new processors. The job entails extensive hands-on lab
work as well as technical leadership and communication across teams.
DESCRIPTION OF DUTIES
1) Provides DDR technical leadership in the development of new test & validation features
2) Closely interacts with silicon design (DRAM controller and phy) in test execution & debug,
as well as in feature definition for future product generation
3) Writes comprehensive electrical & functional test plans for the memory validation of
processors
4) Executes electrical & functional test plans for AMD processors using hardware & software
validation tools, oscilloscopes, & logic analyzers.
5) Debug of electrical & functional issues of the memory sub-system of new processors
6) Provides detailed input into the platform definition & review of platform designs used in the
silicon validation of new processors.
7) Provides technical guidance and training to less experienced engineers and technicians in
the planning, test, & debug of the memory sub-system.
SKILLS REQUIRED
1) BS-EE / BS-CE with at least 10 years directly related experience. An advanced degree will
be considered a plus.
2) Requires experience and demonstrated technical expertise in the development & execution
of platform level electrical & functional test plans. DDR2/3 Memory test experience on
electronic components such as uProcessors would be considered a big plus.
3) Requires extensive hands-on experience and demonstrated technical expertise in the
debug of I/O interfaces such as DDR
4) Demonstrated experience with or knowledge using oscilloscopes, reading schematics and
layout documentation
5) Requires good written and oral communication skills.
6) Demonstrated ability to communicate with a variety of engineering disciplines and
management.

Title: SMTS, Hardware Platform Design Engineer
Location: Shanghai
DESCRIPTION OF POSITION:
Technical leader responsible for graphic, motherboard, and system design in our Shanghai
Research and Development Center (SRDC). Systems are integrated combinations of
hardware components (CPUs, graphics, memory, IO adapters, peripherals, and BMCs) and
software components (firmware, drivers, OS, virtualization, and system management). This
individual will interface with the Marketing, Silicon design, Software, and Validation teams to
define our platforms for new silicon, provide detailed technical direction to the SRDC
engineers to draw schematics, layout the board, develop the System BOM, bring up, debug
issues, and complete Motherboard QA testing.
SPECIFIC JOB FUNCTIONS:
• Motherboard and system specification, negotiate features with input teams and silicon
designers
• Schematic capture and guide layout of motherboards for new silicon
• Feedback and refine design rules with simulation and silicon design teams
• Bring up and validate motherboard and systems
• Negotiate solid solutions to technical issues and design challenges
• Ensure all processes are met in development
• Contribute to client system development processes, team development, tool development
• Support silicon validation, characterization, and debug of existing and new
microprocessor and chip-set products
• Project planning, status tracking, and reporting to senior management
REQUIRED SKILLS:
• Excellent communication skills
• Prior experience with software testing tools and environments, defect tracking, and
revision control
• Familiar with Microsoft Client Operating Systems, Linux Operating Systems, virtualization
software (VMware, Xen, et al), and validation/certification processes for each of these
environments
• Familiar with client system component compatibility and stress testing
• Familiar with high performance client IO adapters, drivers, and stress testing
• Familiar with general Computer Architecture concepts
• Skilled in Cadence Concept schematic capture
PREFERRED SKILLS:
• Familiar with Cadence Allegro layout tools
• Familiar with MS Office & MS Project tool suites
• Familiar with microprocessor bring-up and debug
• Familiar with C/C++, JAVA, and scripting language programming
PREFERRED EDUCATION AND EXPERIENCE:
A Bachelor's and/or Master's degree in Computer Science or Computer Engineering. Requires
10-20 years experience leading computer system development.

Title: PMTS Systems Debug Engineer
Location: Shanghai
DESCRIPTION OF POSITION:
Build and provide technical leadership and direction to the system debug team. Systems
debug team is responsible for analysis and resolution of AMD silicon and system issues which
are on AMD reference platform designs and customer development stage PC systems across
a broad range of market segments using oscilloscopes, logic analyzers and
software/hardware debug tools in an intense but rewarding environment
SPECIFIC JOB FUNCTIONS:
This person is responsible for establishing and maintaining AMD’s technological leadership
position in Systems Debug domain. The individual will be responsible for projects and
processes of significant strategic or commercial importance and for project/program results.
He/she needs to be able to strategize and provide long term planning in technical as well as
managerial. This individual should be able to coach/mentor experienced staff and provide
consultative direction to Senior management. The individual will pioneer hardware/software
design improvements to internal and external designs and will provide solutions to external
and internal customers. Define innovative test fixtures, experiments, diagnostics and analysis
procedures as needed. The successful candidate must have an intimate knowledge of PC
architecture and PC system busses and be a highly motivated, innovative individual with a
keen interest in finding and resolving silicon and platform failures.
PREFERRED EDUCATION AND EXPERIENCE:
A technology related bachelor's degree or equivalent combination of training plus 9 years (or
Masters with 7 years) lead-engineer experience in a computer system development and/or
debug environment. Requires a good understanding of all PC HW and SW ( BIOS / Driver )
elements and knowledge of PC system architecture. Must be proficient in x86 32-bit protected
mode assembly language. Requires effective communications and human relation skills. In
depth experience w/ Hypertransport bus, DDR2 memory and/or PC I/O busses and the ability
to rapidly learn new ones is preferred. Experience with micro-architecture and debug of AMD
chipsets and/or CPUs would be a plus. Publications/patents in the system design/debug and
participation in industry wide forums are preferred.

Title: Sr. Hardware Platform Design Engineer
Location: Shanghai
DESCRIPTION OF POSITION:
1.Develops and reviews comprehensive specifications for board-level and system-level
products, based on a clear understanding of the function to be demonstrated across design,
testing, and use of the product
2.Designs board level products to meet the requirements of the project to agreed schedule,
quality and cost requirements across the whole development lifecycle.
3.Focus on the electronic circuit design, test and debugging for the microprocessor based
products such as PC desktop, mobile and server system.
4.Responsible for board/system level development including schematics design, components
selection, system bring-up, tuning, and functional validation and debugging.
5.Feedback and refine design rules with simulation and silicon design teams
6.Negotiate solid solutions to technical issues and design challenges
7.Ensure all processes are met in development
8.Provides guidance for less experienced engineers
PREFERRED EXPERIENCE:
1. 5 + years experience in PC desktop, mobile or server system development or sustaining.
2. Strong hardware design skills as measured by successful delivery of digital designs.
3. Knowledge of design flow, product development processes, reliability verification, validation
and compatibility testing.
4. Experience in Microprocessor based motherboard designs in the PC Desktop, Mobile and
Server markets.
5. Familiar with PC, mobile or server architecture.
6. Proficient with the Windows Operating System.
7. Basic understanding of UNIX/Linux, software languages, and HDL sufficient to help debug
system problems
8. Bachelor or above degree in an Engineering or Science area.
9. Ability to clearly communicate technical ideas across disciplines.
10. Proficient English and Mandarin (listening, writing and speaking).
11. Strong passion for achievement and career development.
12. Self-motivated and able to work independently and effectively to meet time requirements.

JOB TITLE: Sr. Electrical Analysis Engineer
LOCATION: Shanghai
JOB DESCRIPTION
Electrical test and debug engineer for CPU interfaces including DDR, Hypertransport, & Misc
I/O in addition to functional validation & debug of CPU power management features. In this
role, the engineer will be part of a team that does the initial bring-up of new CPU’s & will work
closely with the CPU validation teams plus platform design, silicon design, & BIOS teams to
define the appropriate platform features & test plans for silicon validation. The engineer will
also be very engaged in the debug of electrical & functional issues discovered as part of CPU
validation, particularly in the areas for DDR & power management.
SKILLS REQUIRED
1) BS-EE / BS-CE and 3 years directly related experience. An advanced degree will be
considered a plus.
2) Requires experience and demonstrated technical expertise in the development & execution
of platform level electrical & functional test plans. DDR2/3 Memory, PCIx/PCIe or Hyper
Transport Bus test experience on electronic components such as uProcessors would be
considered a big plus.
4) Requires experience and demonstrated technical expertise in the debug of I/O interfaces
such as DDR & Hyper Transport
5) Demonstrated experience with or knowledge using oscilloscopes, reading schematics and
layout documentation, and MS Windows and Office applications.
6) Requires good written and oral communication skills. Demonstrate the ability to
communicate with a variety of engineering disciplines and management.
DESCRIPTION OF DUTIES
1) Executes electrical & functional test plans for AMD processors using hardware & software
validation tools, oscilloscopes, & logic analyzers.
2) Use Oscilloscopes, Logic Analyzers and other tools to isolate and debug device and
hardware problems in order to resolve internal release and complex customer related
problems.
3) With limited direction, direct and define DDR Margining Test procedures on AMD
Processors.
4) Writes comprehensive electrical & functional test plans for the validation of AMD
processors
5) May review design specifications and manuals for AMD's system software and hardware
based products with regards to their use within the testing infrastructure currently established
or within future plans.
6) May lead or give direction and training to less experienced engineers and technicians.
7) Works on related projects or assignments as needed.
PROBLEM SOLVING/DECISION MAKING/ACCOUNTABILITY:
1) Exercises judgment within defined practices in selection of methods and techniques for
obtaining results.
2) Expected to be complete tasks in a timely manner with thorough reporting of results
verbally and/or written form

Title: Lab & Inventory Specialist
Location: Shanghai
Key Job Responsibilities:
-Responsible for the daily management of all Validation testing hardware and software
receiving, check-in, location, check-out in a timely manner
-Maintain multiple inventory database systems/tools covering HW/SW and documentation
-Responsible for providing customized inventory status report and inventory space analysis
-Responsible for initiating and executing internal inventory item audit: monthly testing sample
audit, quarterly testing sample audit, support yearly inventory audit
-Responsible for monitoring and driving semi-yearly inventory reclaiming process
-Work with global logistics team and onsite import/export agent to control inventory shipping
inbound & outbound time/cost for validation labs
-Responsible for tracking Validation sample/equipment orders in specific systems with regular
update to project management team
-Responsible for working with asset management team to locate and track Validation asset
and providing status update
-Coordinate Validation engineering purchase request among GSM, Admin and Finance,
execute payment request and track spending
-Responsible for maintaining a testing software server with updated drivers and
documentation
-Responsible for duplicating and registering all testing software
Qualification
-Experience in IT industry inventory control with strong data tracking and reporting ability
-Computer software and tool manipulation: MS Office, Sharepoint, Visio, material logistics
database
-Knowledge in statistics, asset management and material auditing
-High sense of IP protection and respect to R&D security
Preferred but not required
-Experience in engineering equipment and R&D sample import/export control

Title: Validation Engineer
Location: Shanghai
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
- Response to validate the system and silicon for internal design teams.
- Perform the Software and Hardware level test using external and internal AMD test tools,
including oscilloscope, analyzer, margin test tools, functional test…etc;
- Analyze the failures found in testing and support the internal design team to find the root
cause of the issues;
- Assist validation team in improving the validation methods and procedures.
PREFERRED EXPERIENCE:
- Bachelor degree of electrical engineering/computer science/computer engineering;
- Good written and oral communication skills in both English and Chinese.
- Self-motivated and able to work independently and effectively to meet time requirements.
- Basic Experience with Networking and Mobile/Desktop/Server/Workstation.
- Good knowledge of computer architecture and operating systems (Windows & Linux)
- Linux Command Line Knowledge, knowledge of Windows.
- Familiar with Oscilloscope and other electrical test tools

Title: Sr. Validation Engineer
Location: Shanghai
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
• To verify and validate hardware products designed and developed in house at AMD using the
standard qualification process and participates in creating/improving all phases of test
procedures and methodologies.
• Participate in developing test strategies and Methodologies.
• Participate in defining, reviewing and improving test plans/procedures.
• Analyze the failures found in testing and support the internal design team to find the root
cause of the issues;
• Assist validation team in improving the validation methods and procedures.
• Executing and/or automating the tests including some signal integrity analysis.
• Communicate with various internal departments to resole anomalies.
• Participate in issuing internal/external releasable test reports.
PREFERRED EXPERIENCE:
• Bachelor degree of electrical engineering/computer science/computer engineering;
• Good written and oral communication skills in both English and Chinese.
• Self-motivated and able to work independently and effectively to meet time requirements.
• Minimum 5 years of industrial experience in a hardware product testing or development
environment
• Strong knowledge of computer architecture and all operating systems.
• Experienced in product development and sustaining process.
• Experience in system level hardware validation and automation software design.
• Linux Command Line Knowledge, knowledge of Windows.
• Familiar with Oscilloscope and other electrical test tools

Title: Validation Engineer
Location: Shanghai
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
• To verify and validate hardware products designed and developed in house at AMD(ATI)
using the standard qualification process developed within the hardware qualification group and
participates in creating/improving all phases of test procedures and methodologies.
• Analyze the failures found in testing and support the internal design team to find the root
cause of the issues;
• Assist validation team in improving the validation methods and procedures.
• Executing and/or automating the tests including some signal integrity analysis.
• Communicate with various internal departments to resole anomalies
• Participate in issuing internal/external releasable test reports.
PREFERRED EXPERIENCE:
• Bachelor degree of electrical engineering/computer science/computer engineering;
• Good written and oral communication skills in both English and Chinese.
• Self-motivated and able to work independently and effectively to meet time requirements.
• Minimum 3 years of industrial experience in a hardware product testing or development
environment
• Proficient in using electronic equipments such as digital oscilloscope, logic and network
analyzer.
• Proficient in using all MS operating systems and the configuration/setting of PCs.
• Experienced in video/graphics product development and sustaining, system level hardware
and software design
• Solid background in IC technology
• Experienced in board level design and development.
• Familiarity with Linux is an asset.
Title: Sr. PCB Layout Engineer
Location: Shanghai
Graphics Platform Engineering Team has immediate opening for a Sr. PCB layout engineer. Key
responsibilities and requirements listed below
KEY RESPONSIBILITIES
• AMD graphics and CPU MB PCB layout
• Customer support on PCB layout issues
• PCB layout new technology development
REQUIREMENTS
• B.Sc. or M.Sc. In EE or CS or equivalent is required
• Good English required – verbal and written
• Mandarin
EXPERIENCE AND SKILLS
• A minimum of 6+ years hands on experience for PC/server motherboard or graphics board PCB layout
design(6+ years as a bachelor, 4+ years as a master)
• Skillful to operate Cadence Allegro, Concept, ProE along with strong skills in designing high speed,
multi layer, high density designs, Analog/RF layout and power supply layout.
• Hands on experience to create and manage PCB library
• Highly self-motivated and a self starter and have good communications skills.
• Good knowledge of IPC specifications, PCB manufacturing and assembly process
Title: SOFTWARE SUPPORT ENGINEER – GRAPHIC DRIVER
Location: Shanghai
Responsibility:
- Support customers to resolve OS/graphic driver related problems. Duplicate, isolate, and debug the
reported graphic driver issues from customers.
- Work with graphic driver developers to resolve graphic driver issues.
- Build graphics driver based on requests from customers.
- Tracking issue status and communicating with customer.
- Provide design guides and necessary documents to ODMs and OEMs. Communicate critical design
items and share design experience with ODMs/OEMs.
- Answer ODMs/OEMs questions on AMD graphics product.
- On-site support customers when necessary.
Requirement:
- BS or MS in Computer Science, Information Technology, or equivalent.
- Over 2 years (Engineer) / 6 years (Sr. Engineer) of driver coding experience in C/C++
- In-depth knowledge of Windows driver
- In-depth knowledge of Windows OS architecture
- In-depth knowledge of Linux OS is a plus
- Expertise in Windows debugging tools is a must
- Graphics driver related experience is highly preferred
- Assembly code programming experience is a plus
- Proficient English and Mandarin (listening, writing and speaking).
- Ability to work in a team environment
-Willingness to travel for on-site support if required
Title: Sr. Software QA Engineer
Location: Shanghai
1.This person should be able to, with limited direction, test BIOS and chipset driver software for
compliance to specification and overall quality.
2.Should be able to work with AMD's software design teams to help define new AMD products from a
testability, support and customer viewpoint.
3.Should be able to review design specifications and manuals for AMD's system software based BIOS
and driver products.
4.Should be able to write comprehensive test plans used to insure compliance to specification and that
overall quality goals are achieved
5.Should be able to work with AMD customers/partners to define AMD's test procedures, while meeting
customer’s requirements
6.Desire candidate would also have a moderate to high level of programming experience which can be
leveraged for projects which have automated testing opportunities as well as knowledge in open source
and embedded system technologies (a plus)
Basic Requirements:
1.BS or MS in CS, EE or other engineering major
2.5+ years software QA testing experience in the PC industry
3.Strong communication skills in both Chinese and English

Title: MTS Software Development Engineer
Location: Shanghai
Responsibilities
- Co-work with Toronto architect close to drive Linux Graphics Driver architecture, and keep it
advanced in the industry
- Key interface on technical to talk with other components
- Influence/coach team members on their technical careers’ growth
- Key technical contributor in the component
Skill/background requirement
- 6+ years development experience on C language for master degree, or 4+ years development
experience on C language for PhD
- 6+ years Linux kernel development experience for master degree, or 6+ years Linux kernel
development experience for PhD
- 4+ years Linux X.org/XServer development for master degree, or 4+ years Linux X.org/XServer
development for PhD
- Have graphics development experience is a plus
- Familiar with PCI/PCIe/AGP protocol is a plus
- Pass CET-8 is plus

Job Title: Graphics Project Manager
Location: Shanghai
Job Description Summary:
• Provide professional, timely and responsive project management and engineering support for an
assigned list of customer accounts.
• Ensures co-ordination of AE/GPM activities within their team to ensure rollout to customers of complete,
accurate and timely AiB Deployment reference design information and updates via the AiB Resource
Center.
• Develop customer project support schedules, milestones and deliverables. Translate customer
requirements into specific tasks for different functional teams
• Assess priority and severity of customer issues. Collaborate with the Application Engineer (AE) and
coordinates AMD functional engineering resources to close all technical issues ensuring a successful
project launch on behalf of the customer,
• Acts as a first level escalation contact for OEM/AiB/ODM customer project issues (technical and
logistics).
• Recommends and drives customer & internal process improvements within and outside the customer
support services organization as a means to improve overall OEM/AiB/ODM customer satisfaction and
loyalty to AMD.
• Develop and maintain close working relationship with customer development teams. Regularly visit
customers to discuss project status and provide training.
Requirements:
• BS/MS in Electric/Electronic Engineering, Computer Engineering, or equivalent.
• 5+ years in PC/x86 or related industry. Minimum 3 years experience in project management or design,
sustaining, applications engineering or equivalent role within the electronics industry.
• 2 years board design or design support experience is a plus
• 1 year in a direct customer facing role (preferably with OEM customers) is preferred.
• Knowledge of PC design flow, product development processes, reliability verification, validation and
compatibility testing.
• Proficient in English and Mandarin (listening, writing and speaking).
• Must have strong negotiation skills to broker solutions that satisfy both the customer needs and look out
for the interests of AMD.
• Able to work under pressure and multitask
• PMP certification or MBA is a plus.

Job Title: Application Engineer – Mobile Discrete Graphics
Location: Shanghai
Job Description Summary (Optional):
We are looking for a strong Application Engineer in Mobile Discrete Graphics. This is a very exciting,
customer focused role, responsible for technical issue debugging and the solution managing for success
of launching AMD mobile graphics hardware/software on Customer’s Platform. This position offers a
unique opportunity to work with major OEMs and ODMs on state-of-the-art systems in an extremely
dynamic high technology environment.
Job Description:
• The candidate works with internal teams and ODM/OEM technical teams to debug and resolve
customer reported technical issues found in customer designs using AMD mobile graphics products.
• Provide hardware and software technical guidance and information to AMD’s customers to support of
their PC mobile graphics design projects;
• Perform PC schematic and PCB layout reviews
• Respond to ODM/OEM requests for factory on-site support
Requirements:
• A Bachelor’s and /or Master’s degree in Electrical/Electronics Engineering, Computer Engineering, or
equivalent.
• 3+ years HW design and debug experience in Motherboard, notebook, or graphic card.
• Knowledge of notebook design flow, product development processes, reliability verification, validation
and compatibility testing.
• Proficient English and Mandarin (listening, writing and speaking).
• A self-motivated individual who can work well with internal and external engineering experts to develop
practical solutions timely to challenging technical problems
• Experience in Firmware BIOS/ Operating Systems (Windows, DOS, Linux) / Display driver interaction is
a plus
• Know how to use Agilent or Tektronix machine for PCIE, HDMI and Display Port testing and debug is a
plus
• Willingness to travel if required

球翻译

什么都不会 并且看不懂楼主发的意思的 行么

Quote:

引用第4楼chaochaohan于2010-05-15 16:50发表的  :
什么都不会 并且看不懂楼主发的意思的 行么

LZ只负责收集简历，行不行由招聘的人说了算

肯定不是中国区要的吧。。。？

大部分都是engineer  我就不用切咯

上海太贵，活不下去

前段的人飘过 对Application Engineer  有兴趣
但上海房价太贵了 遭不住

  单就硬件设计而言。深。。。。不敢去。估计也没啥意思。

生活水平十分高

我晕，一来就是MTS，发到这里估计是招不到人的