飞思卡尔
飞思卡尔半导体是全球最大的半导体公司之一，在过去的四个季度里总销售额达到64亿美元，为汽车、消费电子、工业控制、网络和无线市场设计并制造嵌入式半导体产品。总部位于德州奥斯汀，在全球30多个国家和地区拥有设计、研发、制造和销售机构，拥有超过24000名员工。
中国更是飞思卡尔全球战略的重要一环，飞思卡尔在中国建有五个研发中心，分别位于北京、天津、苏州、上海和成都，并在北京、上海、深圳、青岛和成都设有五个销售办事处。
飞思卡尔拥有完善的薪酬福利理念及体系。我们紧紧把握市场脉搏，为优秀人才提供具有竞争力的薪酬待遇；我们着重于绩效收入，从中强化以高效业绩驱动的付薪原则，并建立旨在留用公司所需人才的薪资结构以及级别设置。业绩突出的员工还有机会获得股票期权等长期激励项目。
快加入飞思卡尔吧，精彩活动等你来参加，绚丽舞台等你来秀出真我风采！
如欲了解更多信息，请访问飞思卡尔中文网站：
www.freescale.com.cn宣讲会行程安排：
日期 城市 时间 学校 地点
10月30日 哈尔滨 18:30 哈工大 工大活动中心
11月2日 南京 18:30 东南大学 榴园新华厅
11月5日 西安 14：00 西安电子科技大学 阶梯教室114
11月8日 上海 18:30 同济大学 国际会议中心312
11月9日 上海 14:00 上海交通大学 包玉刚5楼讲演厅
11月12日 成都 15:00 电子科技大学 夏新厅
11月14日 杭州 18:00 浙江大学（玉泉校区） 邵逸夫科学馆一楼报告厅
招聘职位：
Title: Embedded Software Development Engineer
Location: Shanghai
Scope of Responsibilities:
Develop SW in Freescale i.MX series application processor (ARM-9, ARM-11, ARM-12 based). Assignment will include but not limit to
WinCE or Linux based BS development
Audio/video/image codec development
Multimedia middleware development
Application development and etc
Develop SW test framework or automation tool. Assignment will include but not limit to
WinCE BSP test case development and maintenance
Linux BSP test case development and maintenance
Multimedia test framework development and maintenance
Codec automation test framework development and maintenance
Application engineering
Interface with customer to do requirement collection and analyzing
Issue/bug diagnostic
Issue/bug fixing
SW build and release management
Specific Knowledge/Skills:
Preferred Degree: Master or above
Preferred Major: Electronic Engineering, Computer Science, Automation, Application physics, Application mathematics and etc
Preferred English level: CETS-6 as mandatory
Preferred Project Experience:
Linux background project experience
WinCE background project experience
Other embedded project experience
SW test or tool development
ARM based processor experience
Audio/video/image codec experience
Title: Product Engineer
Location: Tianjin
Scope of Responsibilities:
Work with Design, Device, Test, Application, Process and QA Engineers, to evaluated new product and new Wafer Fab and Assembly process
Perform and coordinate Reliability and Electrical test and Failure verification and Failure Analysis on the products
Develop, evaluate, and improve manufacturing methods, utilizing knowledge of product design, materials and parts, fabrication processes, tooling and production capabilities, assembly methods and quality control standards. Work flexible hours as required to meet project deadlines and manage department
Specification Configuration and management
Administrative product management (iDDCM, Tandem…)
Build and maintain traceability matrix
Participate in DFMEA
Manage characterization and qualification plan definition
Evaluate test coverage
Drive product characterization: collect and analyze data from lab and final test
Perform product qualification: reliability tests, ESD, Latch-up, etc…
Set up production tools in final test (burn-in, ATE, dash boards…)
Prepare CAB sessions and PPAP documents
Manage yield improvement, zero defect plans (PAT, SBL, JVT…) and Production ramp up and sustaining
CQI investigations (ATE test, lab analysis and FA lab follow up)
Use problem solving tools: 8D, FTA
Specific Knowledge/Skills:
BS Degree or above in electronics engineering
Good command of English both in writing and speaking in a global working environment, CET4
Strong Analog Electronics competences with power device skills and automotive environment knowledge preferred
Basic statistical knowledge is a must, while having experience on SPC(Statistic Process Control) is a plus
Strong synthesis and analysis skills
Test instrumentation techniques and methodology is a must
Hard working and diligent, good team work spirit
Title: Equipment Engineer
Location: Tianjin
Scope of Responsibilities:
Regular equipment maintenance and continues improvement
Keep product line equipment run efficiently
Analyze and resolve problem with equipment to reach zero defect
Coordinate with equipment supplier to improve equipment capacity
Specific Knowledge/Skills:
Bachelor degree or above in Mechanical or Automation related major
Good command of English both in writing and speaking, CET4
Hard working and diligent, good team work spirit
Title: Process Engineer
Location: Tianjin
Scope of Responsibilities:
Optimize semiconductor production process and parameter
Evaluate and improve performance of raw material
Develop new process and product
Specific Knowledge/Skills:
Bachelor degree or above in Mechanical, Automation, Material related major
Good command of English both in writing and speaking, CET4
Be familiar with mechanic and electronic knowledge, process improvement
Ability of independent working and innovation
Hard working and diligent, good team work spirit
Title: Systems & Applications Engineering –DSP
Location: Chengdu
Scope of Responsibilities:
Development, testing, documentation and support of DSP applications as a contributing member of the DSP team in Chengdu. There is special emphasis on regional focus (China, Korea, etc) to this support.
The Generation/Publishing of benchmark results and Application Notes that illustrate the performance available from Freescale Digital Signal Processing (DSP) solutions
Provide the first level of support for regional FAEs and AEs involved in DSP design win efforts.
Specific Knowledge/Skills:
Degree in Computer Science, Electronic/Microprocessor Engineering, or similar discipline.
Exposure to Microprocessor/DSP embedded software systems and/or embedded applications development.
Awareness of the 3G wireless market and equipment is an advantage
Solid understanding of communication systems, experience in networking technology such as broadband access and CPE would be an advantage. TD-SCDMA experience preferred.
A strong embedded software and operating system background, demonstrable Linux/RTOS knowledge is an advantage. Experience in Linux kernel-space programming is very desirable.
Domain knowledge of Communications protocols, Linux Kernel.
Functional command of Spoken/Written English
Title: Systems & Applications Engineering – Quicc Engine
Location: Chengdu
Scope of Responsibilities:
Development, testing, documentation and support of microcode and the associated driver for Freescale PowerQuicc Communication Processor.
To provide technical support to internal/external customers in microcode, upper level software and application development
Able to work with cross functional teams from different regions during the development process.
To deliver technical training on PowerQuicc Communication Processor processors to internal/external customers.
Specific Knowledge/Skills:
Degree in Computer Science, Electronic/Microprocessor Engineering, or similar discipline.
Exposure to Microprocessor/DSP embedded software systems and/or embedded applications development.
Awareness of the 3G wireless market and equipment is an advantage
Solid understanding of communication systems, experience in networking technology such as broadband access and CPE would be an advantage. TD-SCDMA experience preferred.
A strong embedded software and operating system background, demonstrable Linux/RTOS knowledge is an advantage. Experience in Linux kernel-space programming is very desirable.
Domain knowledge of Communications protocols, Linux Kernel.
Functional command of Spoken/Written English.
Occasional travel to work at customer site is required
Title: IC Front-end Engineer
Location: Suzhou
Scope of Responsibilities:
Responsible for IC digital designs by high level languages (e.g. Verilog/VHDL, C) with the followings:
IP/Module development by Verilog coding and C modeling where necessary, doing simulations, synthesis, create module block guide and module/chip level verifications.
Digital IC designs primarily focused on MCU products, play partial or full role in SOC design area includes RTL code using Verilog HDL, functional verification, synthesis, DFT, ATPG, formal verification, Power analysis, clock & reset strategy, top-level integration and timing closure
New design methodology exploring for both SOC projects and IPs
Work closely with product engineer to do test patterns generation/conversion/debugging and deliver final test patterns to product engineer
Participate in the system architecture definition and work as a global team to do complex SOC design based on embedded MCU
Specific Knowledge/Skills:
Master and PhD Degree in Electronic, Communication and Microelectronics Engineering.
Good English reading, writing, good verbal English is preferred
Relevant project experience in digital designs based on high-level languages, either in ASIC or FPGA, with basic knowledge of digital design flow, including coding, simulation, synthesis, DFT, STA, test.
Relevant experience in the area of embedded processors, MCU is a big plus.
Familiar with main EDA tools, such Synopsys, Cadence and Mentor. Good grasp of Verilog/VHDL, C/C++ and Perl/TCL scripts in Linux/Unix environment.
Strong teamwork sense, good communication skills and strong self-motivation is require
Title: IC Backend Design Engineer
Location: Suzhou
Scope of Responsibilities:
Responsible for physical synthesis, clock tree synthesis, STA and final timing closure.
Also as a layout engineer, he/she will be responsible for floorplan generation, power planning, P&R, DRC/LVS and final GDS tape out.
Also need to attack signal integrity issues (IR drop, cross-talk) under deep submicron process.
Design for manufacture analysis and optimization
Specific Knowledge/Skills:
BS/higher Degree in Electronic, Communication and Microelectronics Engineering.
Good English reading, writing, good verbal English is preferred
Relevant project experience in IC designs, with basic knowledge of digital design flow, including synthesis, STA and physical implementation.
Good knowledge/background in the MCU is a big plus.
Relevant experience in the area of embedded processors, MCU is a big plus.
Familiar with main EDA tools, Cadence and Mentor. Good grasp of Verilog/VHDL, C/C++ and Perl/TCL scripts in Linux/Unix environment.
Title: SoC CAD Layout Engineer (FSQX)
Location: Tianjin
Scope of Responsibilities:
Perform backend work, including but not limited to Floorplan, Clock Tree Synthesis, Placement, Route, Extraction, Signal Integrity, IR drop, Timing, optimization, Static Timing Analysis, Design For Manufacturing, Physical verification.
Specific Knowledge/Skills:
M.S. degree in Electrical Engineering or equivalent
Good command of English both in writing and speaking, CET4
Backend hands on experience and flow understanding
Fast learner, good team player, willing to work with others
Title: IC Design Verification Engineer (FSQX)
Location: Tianjin
Scope of Responsibilities:
Contributes to project verification plan development for SOC end to end testing following IP integration.
Contributes to verification testbench design and implementation for Verilog and System Verilog solutions.
Expands upon a coverage driven constrained random test suite development methodology.
Extensive test development, debug and coverage analysis to identify all design defects.
Heavily involved or leading functional and gate simulation efforts using Cadence and Synopsys tools.
May perform other duties in areas of digital design, synthesis and timing analysis as individual skills enable contributions in these areas.
Specific Knowledge/Skills:
Bachelor or above in Electronic, Communications, Microelectronics Engineering and Computer Science
Must be able to communicate in both written and spoken English, CET4
Experience in digital design based on high-level languages, with knowledge of IC design flow, including coding, simulation, verification, synthesis, DFT and STA
Good communication skills and the ability to work well as a team
Knowledge in Verilog, testbench architecture, verification flow
Knowledge of formal verification is a bonus
Familiar with mainstream EDA tools from Synopsis, Cadence and Mentor, like NC-Verilog, VCS, DC/PC, RC, PrimeTime, Fastscan and so on
Languages: Verilog, C/C++, System Verilog, Perl/TCL, UNIX scripting
